Append to GNU make variables via command line

Question

I am using a GNU-make Makefile to build a C project with several targets (all, clean, and a few project specific targets). In the process of debugg

Answer 1

Check out the override directive. You will probably need to modify the makefile once, but it should do what you want.

Example makefile:

override CFLAGS += -Wall

app: main.c
    gcc $(CFLAGS) -o app main.c 

Example command lines:

$ make
gcc -Wall -o app main.c 
$ make CFLAGS=-g
gcc -g -Wall -o app main.c