I\'m trying to create a Makefile which places my .o files in a different directory than my source files. I\'m trying to use a pattern rule so I don\'t have to c
.o
After re-reading the documentation on static pattern rules, I derived the following pattern rule which seems to work.
$(OBJ_DEBUG): $(OBJDIR_DEBUG)/%.o: %.cpp $(CXX) $(CFLAGS_DEBUG) $(INC_DEBUG) -c $< -o $@
I'm not sure this is the best approach, and I'm open to suggestions.