C++ Memory Barriers for Atomics

Question

I\'m a newbie when it comes to this. Could anyone provide a simplified explanation of the differences between the following memory barriers?

• The windows

Answer 1

See my answer here on the hardware level semantics of fences. What is not mentioned there is that they also prevent reordering of loads, stores or loads & stores(depending on the fence) across fences, at both compiler level and hardware level.