GCC memory barrier __sync_synchronize vs asm volatile(“”: : :“memory”)

Question

asm volatile(\"\": : :\"memory\") is often used as a memory barrier (e.g. as seen in the Linux kernel barrier macro).

This sounds similar t

Answer 1

A comment on the usefulness of SW-only barriers:

On some micro-controllers, and other embedded platforms, you may have multitasking, but no cache system or cache latency, and hence no HW barrier instructions. So you need to do things like SW spin-locks. The SW barrier prevents compiler optimizations (read/write combining and reordering) in these algorithms.