How to pass macro definition from “make” command line arguments (-D) to C source code?

Question

I usually pass macro definitions from \"make command line\" to a \"makefile\" using the option : -Dname=value. The definition is accessible inside the makefile.

I al

Answer 1

Just use a specific variable for that.

$ cat Makefile 
all:
    echo foo | gcc $(USER_DEFINES) -E -xc - 

$ make USER_DEFINES="-Dfoo=one"
echo foo | gcc -Dfoo=one -E -xc - 
...
one

$ make USER_DEFINES="-Dfoo=bar"
echo foo | gcc -Dfoo=bar -E -xc - 
...
bar

$ make 
echo foo | gcc  -E -xc - 
...
foo