Expanding on Pascal's answer, on the x86 architecture, the very first byte indicates which category of instructions the one being decoded belongs to:
1 byte length, which means that it's been read already and can be further processed,
1 byte opcode with a few more bytes (the so called ModRM and SIB bytes) to indicate which operands are following (registers, memory addresses), and their operands.
instruction prefix, which:
- modify the meaning of the instruction, (repetition -
REP, locking semantics - LOCK)
- indicate that the next bytes encode an instruction introduced in later iterations of the original 8086 cpu, to either extend the size of its operands to 32 or 64 bits, or redefine the opcode meaning completely.
Furthermore, depending on the mode the CPU runs in, some prefixes may or may not be valid: for instance, the REX and VEX prefixes were introduced to implement 64 bits and vector instructions respectively, but they are interpreted as such in 64 bits mode only. REX, because of its format, covers a large number of existing instructions in the original instruction set, which cannot be used anymore in 64 bits (I suppose that the VEX prefix works similarly, though I don't know anything about it). Its fields indicate the following instruction operand size, or access to extra registers only available on 64 bits (R8 to R15 and XMM8 to XMM15).
If you study the opcodes internal patterns, you'll notice that certains bits consistently indicate which category the instruction belongs to, leading to a somewhat fast decoding.
VAX is another architecture (popular from the end of the 70's up to late 80's) which sported variable length instructions, based on similar principles. For its first iterations, instructions were probably decoded sequentially, so the end of an instruction indicated the start of a new one on the next byte. As you may know, the company which made these also produced its polar opposite, the RISC Alpha CPU, which became one of the (if not the) fastest CPU of its time, with fixed length instructions, a choice certainly made in reaction to the requirements of pipelined, superscalar technologies burgeoning at the time.
