Instruction decoding when instructions are length-variable

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Happy的楠姐
Happy的楠姐 2020-12-01 13:09

Here are some instructions and their corresponding encodings:

55                      push   %ebp
89 e5                   mov    %esp,%ebp
83 ec 18                   


        
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  •  隐瞒了意图╮
    2020-12-01 13:47

    I won't be able to answer how exactly they are decoded, but I can answer why they are of variable length.

    The reason for variable length is both due to the desire to keep code size small as well as unforeseen instruction set extensions.


    Reducing Instruction Size

    Some instructions (by nature), need a lot more space to encode. If all instructions were set at a sufficiently large fixed length to accommodate these, there would be a lot of wasted space in the instruction code. Variable length instructions allows instructions to be "compressed" down to a smaller size.


    (Unforeseen) Instruction Set Extensions

    The other reason is instruction set extensions. Originally, x86 only had 256 opcodes. (1 byte) Then there was a need to add more instructions, so they threw out one instruction and used its opcode as an escape character for new opcodes. The result is that the newer instructions were longer. But it was the only way to extend the instruction set and maintain backward compatibility.

    As for how the processor decodes these, it's a complicated process. For each instruction, the processor needs to find the length and decode from there. This leads to an inherently sequential decoding process that is a common performance bottleneck.

    Modern x86 processors have what is called a uop (micro-op) cache that caches the decoded instructions into something that's more manageable (and RISC-like) by the processor.

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