How instructions are differentiated from data?

Question

While reading ARM core document, I got this doubt. How does the CPU differentiate the read data from data bus, whether to execute it as an instruction or as a data that it c

Answer 1

The original ARM design had a three-stage pipeline for executing instructions:

1. FETCH the instruction into the CPU
2. DECODE the instruction to configure the CPU for execution
3. EXECUTE the instruction.

The CPU's internal logic ensures that it knows whether it is fetching data in stage 1 (i.e. an instruction fetch), or in stage 3 (i.e. a data fetch due to a "load" instruction).

Modern ARM processors have a separate bus for fetching instructions (so the pipeline doesn't stall while fetching data), and a longer pipeline (to allow faster clock speeds), but the general idea is still the same.