How do I Understand Read Memory Barriers and Volatile

Question

Some languages provide a volatile modifier that is described as performing a \"read memory barrier\" prior to reading the memory that backs a variable.

Answer 1

volatile in most programming languages does not imply a real CPU read memory barrier but an order to the compiler not to optimize the reads via caching in a register. This means that the reading process/thread will get the value "eventually". A common technique is to declare a boolean volatile flag to be set in a signal handler and checked in the main program loop.

In contrast CPU memory barriers are directly provided either via CPU instructions or implied with certain assembler mnemonics (such as lock prefix in x86) and are used for example when talking to hardware devices where order of reads and writes to memory-mapped IO registers is important or synchronizing memory access in multi-processing environment.

To answer your question - no, memory barrier does not guarantee "latest" value, but guarantees order of memory access operations. This is crucial for example in lock-free programming.

Here is one of the primers on CPU memory barriers.