What is the difference between reg and wire in a verilog module

Question

What is the difference between a reg and a wire? When are we supposed to use reg and when are we supposed to use wire in a verilog module. I have also noticed sometimes that

Answer 1

Simple difference between reg and wire is, the reg is used in combinational or sequential circuit in verilog and wire is used in combinational circuit

reg is used to store a value but wire is continuely driven some thing and wire is connected to outport when module initialization but reg is con not connected