Multiline bash commands in makefile

Question

I have a very comfortable way to compile my project via a few lines of bash commands. But now I need to compile it via makefile. Considering, that every command is run in it

Answer 1

As indicated in the question, every sub-command is run in its own shell. This makes writing non-trivial shell scripts a little bit messy -- but it is possible! The solution is to consolidate your script into what make will consider a single sub-command (a single line).

Tips for writing shell scripts within makefiles:

1. Escape the script's use of $ by replacing with $$
2. Convert the script to work as a single line by inserting ; between commands
3. If you want to write the script on multiple lines, escape end-of-line with \
4. Optionally start with set -e to match make's provision to abort on sub-command failure
5. This is totally optional, but you could bracket the script with () or {} to emphasize the cohesiveness of a multiple line sequence -- that this is not a typical makefile command sequence

Here's an example inspired by the OP:

mytarget:
    { \
    set -e ;\
    msg="header:" ;\
    for i in $$(seq 1 3) ; do msg="$$msg pre_$${i}_post" ; done ;\
    msg="$$msg :footer" ;\
    echo msg=$$msg ;\
    }