How can I define #define in my Make files

Question

In my c/c++ files, there are multiple #define. As an example:

#ifdef LIBVNCSERVER_HAVE_LIBZ
  /* some code */
#ifdef LIBVNCSERVER_HAVE_LIBJPEG
  /* some more cod         


        

Answer 1

Add the line below, to your makefile:

DEFINES=LIBVNCSERVER_HAVE_LIBZ LIBVNCSERVER_HAVE_LIBJPEG
...
... further on in your makefile on the line where it says ....
...
    $(cc) ($(addprefix -D, $(DEFINES))) .....
...
...

This is to serve as an example, you only add another define to the DEFINES variable which gets referenced on the line as shown $(cc) -D$(DEFINES) in which the make will automatically expand the variable and compile those that are #ifdefd.

Thanks to R Samuel Klatchko for pointing out a small amiss...this is specifically for GNU's make, you can use addprefix do properly do that ($(addprefix -D, $(DEFINES))).