_mm_cvtsd_f64 analogon for higher order floating point

匆匆过客 提交于 2019-12-20 03:38:17

问题


I'm playing around with SIMD and wonder why there is no analogon to _mm_cvtsd_f64 to extrat the higher order floating point from a __m128d.

GCC 4.6+ has an extension which achieves this in a nice way:

__m128d a = ...;
double d1 = a[0];
double d2 = a[1];

But on older GCC (i.e 4.4.) the only way I could manage to get this is to define my own analogon function using __builtin_ia32_vec_ext_v2df, i.e.:

extern __inline double __attribute__((__gnu_inline__, __always_inline__, __artificial__))
_mm_cvtsd_f64_h (__m128d __A)
{
  return __builtin_ia32_vec_ext_v2df (__A, 1);
}

__m128d a = ...;
double d1 = _mm_cvtsd_f64(a);
double d2 = _mm_cvtsd_f64_h(a);

Is this really the way to go? Is there any alternative that does not use potentially compiler-specific __builtin stuff? And again - why is there no _mm_cvtsd_f64_h or similar predefined?

This alternative I could come up with is much slower btw:

_mm_cvtsd_f64_h(__m128d __A) {
    double d[2];
    _mm_store_pd(d, __A);
    return d[1];
}

回答1:


I suggest that you use the following code:

inline static _mm_cvtsd_f64_h(__m128d x) {
    return _mm_cvtsd_f64(_mm_unpackhi_pd(x, x));
}

This is likely the fastest way to get get the upper half of xmm register, and it is compatible with MSVC/icc/gcc/clang.




回答2:


You can just use a union:

union {
    __m128d v;
    double a[2];
} U;

Assign your __m128d to U.v and read back U.a[0] or U.a[1]. Any decent compiler will optimise away redundant stores and loads.



来源:https://stackoverflow.com/questions/19359372/mm-cvtsd-f64-analogon-for-higher-order-floating-point

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