Makefile dealing with header files

问题

The following is my makefile:

CC=gcc
CFLAGS=-Wall -O3
SRCS = $(wildcard *.c)
EXES = $(patsubst %.c,%,$(SRCS))
.c.o:
        $(CC) $(CFLAGS) -c $<
SRC_CODE=\
        file1.c\
        file2.c\
        file.h
SOFI2D_OBJ=$(SRC_CODE:%.c=%.o)
sofi2D: $(SOFI2D_OBJ)
        $(CC) $^ -o $@
clean:
        rm -rf *.o *.o* *~ $(EXES)   
all: clean sofi2D

I wonder how the header file (.h) plays a role in the compilation? Because all the operations are on .c files...

回答1:

The header file is used by the C compiler, not make.

If you want the .c files to be rebuilt if file.h changes, then you need to change the definition of SRC_CODE:

SRC_CODE = file1.c file2.c
$(SRC_CODE): file.h

来源：https://stackoverflow.com/questions/49393912/makefile-dealing-with-header-files