Addressable vs Alignment

跟風遠走 提交于 2019-12-11 10:14:17

问题


My questions are related to memory?

  1. What is the difference between alignment and addressable? If a memory is byte addressable and word aligned then can't we directly have a word addressable memory?

  2. Also when we say we have a block transfer what does it mean. As in if the size of the block is greater than word (databus),then does that mean it takes more than one cycle to transfer.


回答1:


Short answer

Addressability refers to the smallest unit of memory that can be accessed, while alignment relates to accesses to larger groupings of memory (typically called a word).

Detailed answer

This question is probably best answered with an example. Imagine a byte-addressable architecture that has 4 byte words. For this example we will only consider loads and assume there are two types LB (load byte) and LW (load word of 4 bytes).

First consider an LB operation. In this case the CPU actually accesses 4-bytes from the cache, and then shifts the output to pick the desired byte. So LB 0x10 or LB 0x11 each access 4 bytes of memory from 0x10 to 0x13. It doesn't really matter what the alignment of this access is.

Next consider an aligned LW operation. The LW reads 4 bytes from memory. So LW 0x10 reads the 4 bytes from address 0x10 to 0x13. This can be done as a single operation just like the LB operation.

However an LW 0x11 operation would be an unaligned access. It actually needs the data from 0x11 to 0x14, but the data that is read from the cache comes in 4 byte chunks. So it would read the 4 bytes from 0x10 to 0x13 and also have to perform another access that reads from 0x14 to 0x17. Then it would pick the desired bytes 0x11 to 0x14 from these two accesses.

There are ways to optimize unaligned accesses at the microarchitecture level so that an unaligned access it not as costly as two aligned accesses, but an unaligned access will always require the CPU to do more work than an aligned access. As a result some architecture prohibit unaligned accesses. The LB is still allowed even for architectures that prohibit unaligned accesses, because the LB operation only needs a subset of the bytes from an aligned access. Whereas an unaligned accesses needs a subset of bytes from two aligned accesses. Other architectures allow unaligned accesses so as to not limit programmer flexibility, but they still recommend that programs perform mostly aligned accesses whenever possible.

For the second part of your question I'm not exactly sure what you mean by block transfer. But if you are accessing more data than fits on the data bus then yes it will require more than a single cycle.



来源:https://stackoverflow.com/questions/33919961/addressable-vs-alignment

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