Cannot configure SPI0 on BeagleBone Green Wireless

问题

Note: the selected answer is the original one that solved the problem, for more details refer to the additional one below.

I'm not able to configure SPI0 on my BeagleBone Green Wireless (BBGW). I'm trying to achieve this without using overlays, only pure DeviceTree.

/dev/spidev1.0 and /dev/spidev1.1 are there, but any I/O returns garbage.

Oscilloscope connected to SCLK displays mostly noise, here are pictures (each in different time scale).

Important parts of my .dts/.dtsi:

&am33xx_pinmux {
    bb_spi0_pins: pinmux_bb_spi0_pins {
        pinctrl-single,pins = <
            BONE_P9_22 ( PIN_INPUT_PULLUP | MUX_MODE0 ) // SCLK
            BONE_P9_21 ( PIN_INPUT_PULLUP | MUX_MODE0 ) // MISO
            BONE_P9_18 ( PIN_OUTPUT_PULLUP | MUX_MODE0 ) // MOSI
            BONE_P9_17 ( PIN_OUTPUT_PULLUP | MUX_MODE0 ) // CS0
        >;
    };
};

&spi0 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&bb_spi0_pins>;
    #address-cells = <1>;
    #size-cells = <0>;

    channel@0 {
        #address-cells = <1>;
        #size-cells = <0>;
        compatible = "linux,spidev";
        spi-max-frequency = <16000000>;
        reg = <0>;
    };

    channel@1 {
        #address-cells = <1>;
        #size-cells = <0>;
        compatible = "linux,spidev";
        spi-max-frequency = <16000000>;
        reg = <1>;
    };
};

More info:

I didn't use the available am335x-bone-pinmux-spi0.dtsi as it enables the clock phase shift (spi-cpha)
I'm intending to use the SPI to communicate with a DWM1000
I'm using a custom cape with the said DWM1000, a power converter and 2 motor drivers connected to PRU pins on P8 connector
Full overlay files: https://github.com/GroupOfRobots/RobotConfig/tree/v3/DevTree
uEnv.txt: https://github.com/GroupOfRobots/RobotConfig/blob/v3/uEnv.txt
system: Debian 9.0 (testing)
kernel: 4.4.80-ti-rt-r116 (I've tried on different ones too, but I need one of the ti-rt branch)

PS. I know it's BBGW not BBB but there are no tags for BBG/BBGW (yet).

Update:

The behaviour was verified to be the same on other kernels, namely:

4.4.85-armv7-x14
4.4.84-ti-r120
4.4.85-bone19

Additionally I've connected together MISO and MOSI (pins 18 and 21 on P9) with a jumper wire and ran spidev_test, here are the results:

$ sudo ./spidev_test -v -p "abcdefghijklmnopqrstuvwxyz1234\xde\xad" 
spi mode: 0x0
bits per word: 8
max speed: 500000 Hz (500 KHz)
TX | 61 62 63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 73 74 75 76 77 78 79 7A 31 32 33 34 DE AD  | abcdefghijklmnopqrstuvwxyz1234ޭ
RX | 03 0C 0F 30 33 3C 3F C0 C3 CC CF F0 F3 FC FF 00 03 0C 0F 30 33 3C 3F C0 C3 CC 03 0C 0F 30 FC F3  | ...03<?�������.....03<?���...0��

I can't make anything out of it, but it makes me almost sure it's not due to the capacitors on clock line, which is unused in this test.

回答1:

I had the same problem, i was using adafruit-spi0 overlays and i couldn't get it working. I was able to send the data on a slave spi device and the recieved data was ok, but when the second device sends the data back to my BBGW i was not getting the values that i have sent.

This is how i solved this, there are two capacitors 100pf on the spi0 clk they are causing reflections resulting in double-clocked data, you need to remove them.

My board was oredered from seeed studio.

回答2:

Short answer

Removal of the capacitors, as answered by @suadss is the correct answer.

Slightly longer explanation

As opposed to what's written in the selected answer, only one of the capacitors is on the clock line - the other one is on SPI0_D0 or, in this case, MISO (Master Input Slave Output) line thus corrupting data even when shorting D0 and D1 and completely omitting the clock.

Reasoning behind those capacitors below.

Capacitors' location

Description in case the images are not available anymore

The two 100pF capacitors are located by the edge of the board, under one of the Grove connectors, in the middle between microSD card slot and crossed out Pb sign. There are only 2 of them in the row, as opposed to 3 resitors right next to SD card slot and 3 other elements right next to Pb sign.

Here's a photo (before removal):

Why are they here

Because the exact same GPIOs can be used for UART, just like on BeagleBone Black:

What's different then? This UART is also available on the Grove connector! So, to filter out some noise when using that connector along with long cables, they've added 2 small capacitors. What could go wrong?

One thing that I'm still wondering about is why didn't they use one of free and unused CPU lines for that connector (or even yet another UART, eg UART4 or UART5) - it's all configurable via DTBs anyway and yes, there are free lines:

Source for schematics screenshots: official BBGW schematic

来源：https://stackoverflow.com/questions/45620504/cannot-configure-spi0-on-beaglebone-green-wireless

标签

beagleboneblack

spi

device-tree