Intel AVX : Why is there no 256-bits version of dot product for double precision floating point variables? [closed]

问题

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Closed 6 years ago.

In another question on SO we tried (and succeeded) to find a way to replace the AVX missing instruction:

 __m256d _mm256_dp_pd(__m256d m1, __m256d m2, const int mask);

Anyone knows the reason why this instruction is missing ? Partial answer here.

回答1:

The underlying reason for this and various other AVX limitations is that architecturally AVX is little more than two SSE execution units side by side - you will notice that virtually no AVX instructions operate horizontally across the boundary between the two 128 bit halves of a vector (which is particularly annoying in the case of vpalignr). In general you effectively just get two 128 bit SSE operations in parallel, which is useful for the majority of instructions which just operate in an element-wise fashion, but not as useful as a proper 256 bit SIMD implementation.

来源：https://stackoverflow.com/questions/16033266/intel-avx-why-is-there-no-256-bits-version-of-dot-product-for-double-precision