MSVC /arch:[instruction set] - SSE3, AVX, AVX2

Question

Here is an example of a class which shows supported instruction sets. https://msdn.microsoft.com/en-us/library/hskdteyh.aspx

I want to write three different implementations of a single function, each of them using different instruction set. But due to flag /ARCH:AVX2, for example, this app won't ever run anywhere but on 4th+ generation of Intel processors, so the whole point of checking is pointless.

So, question is: what exactly this flag does? Enables support or enables compiler optimizations using provided instruction sets?

In other words, can I completely remove this flag and keep using functions from immintrin.h, emmintrin.h, etc?

Answer 1

An using of option /ARCH:AVX2 allows to use YMM registers and AVX2 instructions of CPU by the best way. But if CPU is not support these instruction it will be a program crash. If you use AVX2 instructions and compiler flag /ARCH:SSE2 that will be a decreasing of performance (about 2x times).

So the best implementation when every implementation of your function is compiled with corresponding compiler options (/ARCH:AVX2, /ARCH:SSE2 and so on). The easiest way to do it - put your implementations (scalar, SSE, AVX) in different files and compile each file with specific compiler options.

Also it will be a good idea if you create a separate file where you can check CPU abilities and call corresponding implementation of your function.

There is an example of a library which does CPU checking and calling an one of implemented function.