Are SystemVerilog arrays passed by value or reference?

问题

By default, does SystemVerilog pass arrays by value or reference?

For example:

int array[5] = '{0,1,2,3,4};
some_function(array);  // <-- value or reference?

回答1:

By default, SystemVerilog passes arrays by value, copying the entire array.

It is recommended to pass arrays by reference whenever possible for performance reasons.

• If you want your function to modify the array, use ref.
• If you want your function to read the array, use const ref.

Example:

  function void pass_by_value(int array[5], int queue[$], int assoc[int]);
    // Default.
    // A copy of the arrays is made in this function
  endfunction

  function void pass_by_ref(ref int array[5], ref int queue[$],
                            ref int assoc[int]);
    // Original arrays are being referenced
  endfunction

  function void pass_by_const_ref(const ref int array[5],
                                  const ref int queue[$],
                                  const ref int assoc[int]);
    // Original arrays are being referenced
    // And they can be read but cannot be modified in this function 
  endfunction

Example on EDA Playground: http://www.edaplayground.com/x/2m9

来源：https://stackoverflow.com/questions/23395899/are-systemverilog-arrays-passed-by-value-or-reference