x86

问题 What is the order int 13h with ah=02h will read 19 sectors starting at (C, H, S) = (0, 0, 1) provided a (floppy) disk geometry of 2 heads, 18 sectors per track and 80 tracks per side. Or, more generally, what happens when it reaches the end of track 0, head 0? Does it go to track 1 or head 1? Does it even work properly in this case? EDIT: Wait.. is this actually like hours, minutes, seconds? If we reach the end of the track (S is greater than 18), then H is increased? 回答1: Modern BIOSes

问题 I am trying to write all my floating point numbers to .001 precision toward -∞. I have set the RC field to 01 binary, but I am only able to print out the initial floating point number with the wanted precision and thereafter it disregards the rounding. I think I might be missing something obvious in how I am handling the precision towards -∞, but I am not sure. INCLUDE Irvine32.inc .data ctrlWord WORD 010000000000b ; set the RC field to round down toward -∞. .code fild sum ; load integer into

问题 Does the x86 standard include Mnemonics or does it just define the opcodes? If it does not include them, is there another standard for the different assemblers? 回答1: Mnemonics are not standardised and different assemblers use different mnemonics. Some examples: AT&T-style assemblers apply b , w , l , and q suffixes to all mnemonics to indicate operand size. Intel-style assemblers typically indicate this with the keywords byte , word , dword , and qword AT&T-style assemblers recognise cbtw ,

问题 Does the x86 standard include Mnemonics or does it just define the opcodes? If it does not include them, is there another standard for the different assemblers? 回答1: Mnemonics are not standardised and different assemblers use different mnemonics. Some examples: AT&T-style assemblers apply b , w , l , and q suffixes to all mnemonics to indicate operand size. Intel-style assemblers typically indicate this with the keywords byte , word , dword , and qword AT&T-style assemblers recognise cbtw ,

问题 One of the purposes of the C1 bit in the x87 FPU status word is to show whether or not an inexact result was rounded up. Does SSE/AVX provide any such indication for scalar operations? I did not see a similar bit in the MXCSR register. Am I forced to use x87 instructions if I want this information? 回答1: SSE/AVX do not provide hardware support for detecting this, even for scalar instructions like addss . SSE was designed for SIMD, with 4 floats per XMM vector, and presumably Intel didn't want

问题 I need to multiply an integer (two's compliment) by a floating point constant. Here is what I have: .data pi dd 3.14 int dd 0ah .code fld pi ??? fmul ST(1), ST How can I convert int to a floating point value for multiplying against pi ? 回答1: You need the fild instruction. Here's one reference: http://www.website.masmforum.com/tutorials/fptute/fpuchap5.htm 回答2: Using the x86 FPU is really outdated now and way slower than SSE/AVX/etc. Better to use at least SSE with cvtdq2ps doc ex: .data int

问题 I need to multiply an integer (two's compliment) by a floating point constant. Here is what I have: .data pi dd 3.14 int dd 0ah .code fld pi ??? fmul ST(1), ST How can I convert int to a floating point value for multiplying against pi ? 回答1: You need the fild instruction. Here's one reference: http://www.website.masmforum.com/tutorials/fptute/fpuchap5.htm 回答2: Using the x86 FPU is really outdated now and way slower than SSE/AVX/etc. Better to use at least SSE with cvtdq2ps doc ex: .data int

问题 I found this page which has a Hello World example for x86-64 on Linux: http://blog.markloiseau.com/2012/05/64-bit-hello-world-in-linux-assembly-nasm/ ; 64-bit "Hello World!" in Linux NASM global _start ; global entry point export for ld section .text _start: ; sys_write(stdout, message, length) mov rax, 1 ; sys_write mov rdi, 1 ; stdout mov rsi, message ; message address mov rdx, length ; message string length syscall ; sys_exit(return_code) mov rax, 60 ; sys_exit mov rdi, 0 ; return 0

问题 I found this page which has a Hello World example for x86-64 on Linux: http://blog.markloiseau.com/2012/05/64-bit-hello-world-in-linux-assembly-nasm/ ; 64-bit "Hello World!" in Linux NASM global _start ; global entry point export for ld section .text _start: ; sys_write(stdout, message, length) mov rax, 1 ; sys_write mov rdi, 1 ; stdout mov rsi, message ; message address mov rdx, length ; message string length syscall ; sys_exit(return_code) mov rax, 60 ; sys_exit mov rdi, 0 ; return 0

问题 The L1/L2 cache are inclusive in Intel and L1 / L2 cache is 8 way associativity, means in a set there are 8 different cache lines exist. The cache lines are operated as a whole, means if I want to remove few bytes from a cache line, the whole cache line will be removed , not the only those bytes which I want to remove. Am I right ? Now, my question is whenever a cache line of a set is removed/evicted from cache, either by some other process or by using clflush(manual eviction of a cache line