simd | 易学教程

Complex Mul and Div using sse Instructions

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问题 Is performing complex multiplication and division beneficial through SSE instructions? I know that addition and subtraction perform better when using SSE. Can someone tell me how I can use SSE to perform complex multiplication to get better performance? 回答1: Just for completeness, the Intel® 64 and IA-32 Architectures Optimization Reference Manual that can be downloaded here contains assembly for complex multiply (Example 6-9) and complex divide (Example 6-10). Here's for example the multiply

Why the OpenMP SIMD directive reduces performance?

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I am learning how to use SIMD directives with OpenMP/Fortran. I wrote the simple code: program loop implicit none integer :: i,j real*8 :: x x = 0.0 do i=1,10000 do j=1,10000000 x = x + 1.0/(1.0*i) enddo enddo print*, x end program loop when I compile this code and run it I get: ifort -O3 -vec-report3 -xhost loop_simd.f90 loop_simd.f90(10): (col. 12) remark: LOOP WAS VECTORIZED loop_simd.f90(9): (col. 7) remark: loop was not vectorized: not inner loop time ./a.out 97876060.8355515 real 0m8.940s user 0m8.937s sys 0m0.005s I did what the compiler suggested about the "not inner loop" and added a

Optimal uint8_t bitmap into a 8 x 32bit SIMD “bool” vector

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As part of a compression algorithm, I am looking for the optimal way to achieve the following: I have a simple bitmap in a uint8_t . For example 01010011 What I want is a __m256i of the form: (0, maxint, 0, maxint, 0, 0, maxint, maxint) One way to achieve this is by shuffling a vector of 8 x maxint into a vector of zeros. But that first requires me to expand my uint8_t to the right shuffle bitmap. I am wondering if there is a better way? Here is a solution (PaulR improved my solution, see the end of my answer or his answer) based on a variation of this question fastest-way-to-broadcast-32-bits

Push XMM register to the stack

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问题 Is there a way of pushing a packed doubleword integer from XMM register to the stack? and then later on pop it back when needed? Ideally I am looking for something like PUSH or POP for general purpose registers, I have checked Intel manuals but I either missed the command or there isn't one... Or will I have to unpack values to general registers and then push them? 回答1: No, there is no such a asm instruction under x86, but you can do something like: //Push xmm0 sub esp, 16 movdqu dqword [esp]

Crash with icc: can the compiler invent writes where none existed in the abstract machine?

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问题 Consider the following simple program: #include <cstring> #include <cstdio> #include <cstdlib> void replace(char *str, size_t len) { for (size_t i = 0; i < len; i++) { if (str[i] == '/') { str[i] = '_'; } } } const char *global_str = "the quick brown fox jumps over the lazy dog"; int main(int argc, char **argv) { const char *str = argc > 1 ? argv[1] : global_str; replace(const_cast<char *>(str), std::strlen(str)); puts(str); return EXIT_SUCCESS; } It takes an (optional) string on the command

SSE (SIMD): multiply vector by scalar

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问题 A common operation I do in my program is scaling vectors by a scalar (V*s, e.g. [1,2,3,4]*2 == [2,4,6,8]). Is there a SSE (or AVX) instruction to do this, other than first loading the scalar in every position in a vector (e.g. _mm_set_ps(2,2,2,2)) and then multiplying? This is what I do now: __m128 _scalar = _mm_set_ps(s,s,s,s); __m128 _result = _mm_mul_ps(_vector, _scalar); I'm looking for something like... __m128 _result = _mm_scale_ps(_vector, s); 回答1: Depending on your compiler you may be

Constexpr and SSE intrinsics

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Most C++ compilers support SIMD(SSE/AVX) instructions with intrisics like _mm_cmpeq_epi32 My problem with this is that this function is not marked as constexpr , although "semantically" there is no reason for this function to not be constexpr since it is a pure function. Is there any way I could write my own version of (for example) _mm_cmpeq_epi32 that is constexpr ? Obviously I would like that the function at runtime uses the proper asm, I know I can reimplement any SIMD function with slow function that is constexpr . If you wonder why I care about constexpr of SIMD functions. Non

How to use the multiply and accumulate intrinsics in ARM Cortex-a8?

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问题 how to use the Multiply-Accumulate intrinsics provided by GCC? float32x4_t vmlaq_f32 (float32x4_t , float32x4_t , float32x4_t); Can anyone explain what three parameters I have to pass to this function. I mean the Source and destination registers and what the function returns? Help!!! 回答1: Simply said the vmla instruction does the following: struct { float val[4]; } float32x4_t float32x4_t vmla (float32x4_t a, float32x4_t b, float32x4_t c) { float32x4 result; for (int i=0; i<4; i++) { result

Are GPU/CUDA cores SIMD ones?

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Let's take the nVidia Fermi Compute Architecture . It says: The first Fermi based GPU, implemented with 3.0 billion transistors, features up to 512 CUDA cores. A CUDA core executes a floating point or integer instruction per clock for a thread. The 512 CUDA cores are organized in 16 SMs of 32 cores each. [...] Each CUDA processor has a fully pipelined integer arithmetic logic unit (ALU) and floating point unit (FPU). [...] In Fermi, the newly designed integer ALU supports full 32-bit precision for all instructions, consistent with standard programming language requirements. The integer ALU is

Does gcc use Intel's SSE 4.2 instructions for text processing if available?

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I read here that Intel introduced SSE 4.2 instructions for accelerating string processing. Quote from the article: The SSE 4.2 instruction set, first implemented in Intel's Core i7, provides string and text processing instructions (STTNI) that utilize SIMD operations for processing character data. Though originally conceived for accelerating string, text, and XML processing, the powerful new capabilities of these instructions are useful outside of these domains, and it is worth revisiting the search and recognition stages of numerous applications to utilize STTNI to improve performance Does