simd

SSE byte and half word swapping

拥有回忆 提交于 2019-12-12 01:22:50
问题 I would like to translate this code using SSE intrinsics. for (uint32_t i = 0; i < length; i += 4, src += 4, dest += 4) { uint32_t value = *(uint32_t*)src; *(uint32_t*)dest = ((value >> 16) & 0xFFFF) | (value << 16); } Is anyone aware of an intrinsic to perform the 16-bit word swapping? 回答1: pshufb (SSSE3) should be faster than 2 shifts and an OR. Also, a slight modification to the shuffle mask would enable an endian conversion, instead of just a word-swap. stealing Paul R's function

Simd not on my Linux machine: fatal error: simd/simd.h: No such file or directory

北城以北 提交于 2019-12-11 20:39:03
问题 I have a codebase that I can compile and run on my mac but not on my remote linux box and I am not sure why. When I compile I get the error fatal error: simd/simd.h: No such file or directory I am running the command g++ -std=c++11 -c Tester.cpp I have been trying install simd but I cant find instructions for that anywhere. I must not be looking in the right place? Is it possible simd is just not available on my linux machine? 回答1: That appears to be some OS X specific header. 来源: https:/

SIMD intrinsic and memory bus size - How CPU fetches all 128/256 bits in a single memory read?

核能气质少年 提交于 2019-12-11 17:01:04
问题 Hello Forum – I have a few similar/related questions about SIMD intrinsic for which I searched online including stackoverflow but did not find good answers so requesting your help. Basically I am trying to understand how a 64 bit CPU fetches all 128 bits in a single read and what are the requirements for such an operation. Would CPU fetch all 128 bits from memory in a single memory operation or will it do two 64 bit reads? Do CPU manufactures demand certain size of the memory bus, example,

Substitute a byte with another one

谁说胖子不能爱 提交于 2019-12-11 15:39:48
问题 I am finding difficulties in creating a code for this seemingly easy problem. Given a packed 8 bits integer, substitute one byte with another if present. For instance, I want to substitute 0x06 with 0x01 , so I can do the following with res as the input to find 0x06 : // Bytes to be manipulated res = _mm_set_epi8(0x00, 0x03, 0x02, 0x06, 0x0F, 0x02, 0x02, 0x06, 0x0A, 0x03, 0x02, 0x06, 0x00, 0x00, 0x02, 0x06); // Target value and substitution val = _mm_set1_epi8(0x06); sub = _mm_set1_epi8(0x01)

What is this structure called? Simply SoA?

人走茶凉 提交于 2019-12-11 12:43:19
问题 I've seen common comparisons made between the AoS (Array of Structures): struct xyz { ALIGNED float x, y, z, ignored; }; ALIGNED struct xyz AoS[n]; And the SoA (Structure of Arrays): struct SoA { ALIGNED_AND_PADDED float x[n]; ALIGNED_AND_PADDED float y[n]; ALIGNED_AND_PADDED float z[n]; }; So what would this kind of data representation be called? struct xyz4 { ALIGNED float x[4]; ALIGNED float y[4]; ALIGNED float z[4]; }; ALIGNED struct xyz4[n/4] ???; A "cache-efficient SoA"? An AoSoA? An

is it possible convert String to simd_float4x4 ? ( iOS 12 )

梦想的初衷 提交于 2019-12-11 11:27:30
问题 is it possible to construct simd_float4x4 from a string, eg: I had a string which stored simd_float4x4.debugdescription's value ? 回答1: Here is an extension for simd_float4x4 that adds a failable init that takes a debug description and creates the simd_float4x4 . It is a failable init because the string might be ill formed. import simd extension simd_float4x4 { init?(_ string: String) { let prefix = "simd_float4x4" guard string.hasPrefix(prefix) else { return nil } let csv = string.dropFirst

SSE memory access

假如想象 提交于 2019-12-11 10:33:19
问题 I need to perform Gaussian Elimination using SSE and I am not sure how to access each element(32 bits) from the 128 bit registers(each storing 4 elements). This is the original code(without using SSE): unsigned int i, j, k; for (i = 0; i < num_elements; i ++) /* Copy the contents of the A matrix into the U matrix. */ for(j = 0; j < num_elements; j++) U[num_elements * i + j] = A[num_elements*i + j]; for (k = 0; k < num_elements; k++){ /* Perform Gaussian elimination in place on the U matrix. *

Which registers do x86/x64 processors use for floating point math?

限于喜欢 提交于 2019-12-11 09:33:10
问题 Does x86/x64 use SIMD register for high precision floating point operations or dedicated FP registers? I mean the high precision version, not regular double precision. 回答1: The FPU stack is still available and exposes a 80-bits precision arithmetic as @EricPostpischil points out (not sure though if the processor still has the full logic or if this part got emulated at hardware level). It is made available to the developper in GCC with the long double type. For example, the generated assembly

Why can't I use _mm_sin_pd? [duplicate]

可紊 提交于 2019-12-11 09:33:08
问题 This question already has answers here : C++ error: ‘_mm_sin_ps’ was not declared in this scope (3 answers) how can I use SVML instructions [duplicate] (1 answer) Where is Clang's '_mm256_pow_ps' intrinsic? (1 answer) Closed 11 months ago . Specifics says: __m128d _mm_sin_pd (__m128d a) #include <immintrin.h> CPUID Flags: SSE Description Compute the sine of packed double-precision (64-bit) floating-point elements in a expressed in radians, and store the results in dst. But it seems it is not

vector * matrix product efficiency issue

…衆ロ難τιáo~ 提交于 2019-12-11 09:12:52
问题 Just as Z boson recommended, I am using a column-major matrix format in order to avoid having to use the dot product. I don't see a feasible way to avoid it when multiplying a vector with a matrix, though. The matrix multiplication trick requires efficient extraction of rows (or columns, if we transpose the product). To multiply a vector by a matrix, we therefore transpose: (b * A)^T = A^T * b^T A is a matrix, b a row vector, which, after being transposed, becomes a column vector. Its rows