powerpc

Unable to link ppc after upgrading to XCode 4

无人久伴 提交于 2019-12-03 03:14:55
I followed these instructions on how to get the 10.4 SDK working with PPC after upgrading to XCode 4. I am able to compile, but it errors out at link time. As an added wrinkle, I'm not using XCode per se, but the gcc toolchain that comes with it. (This is part of a large cross-platform project that uses makefiles.) Here's a sample makefile: CXX=g++-4.0 CXXFLAGS=-arch i386 -arch ppc -isysroot /Developer/SDKs/MacOSX10.4u.sdk -mmacosx-version-min=10.4 helloworld: helloworld.o $(CXX) $^ -o $@ $(CXXFLAGS) with a helloworld.cpp: #include <stdio.h> int main(void) { printf("hello world \n"); return 0;

How do I add PPC/PPC64 support back to Xcode 4.2 under Lion?

偶尔善良 提交于 2019-12-02 21:51:07
I have a Lion (10.7.1) system on which I installed Xcode 4.2. Suppose I have a simple C program helloWorld.c as follows: #include <stdio.h> main() { printf("hello, world\n"); } Using this setup, I would like to try to compile helloWorld.c for use on PPC and PPC64 architectures, e.g. : $ gcc -arch ppc helloWorld.c -o helloWorld This gives the following error message: llvm-gcc-4.2: error trying to exec '/usr/bin/../llvm-gcc-4.2/bin/powerpc-apple-darwin11-llvm-gcc-4.2': execvp: No such file or directory How do I restore support for PowerPC to my Xcode 4 installation? I have tried the instructions

Does `isync` prevent Store-Load reordering on CPU PowerPC?

为君一笑 提交于 2019-11-30 14:56:24
As known, PowerPC has weak memory model, that permit any speculative reordering: Store-Store, Load-Store, Store-Load, Load-Load. There are at least 3 Fences: hwsync or sync - full memory barrier, prevents any reordering lwsync - memory barriers that prevents reordering: Load-Load, Store-Store, Load-Store isync - instruction barrier : https://www.ibm.com/support/knowledgecenter/en/ssw_aix_71/com.ibm.aix.alangref/idalangref_isync_ics_instrs.htm For example, can be reordered Store- stwcx. and Load- lwz in this code?: https://godbolt.org/g/84t5jM lwarx 9,0,10 addi 9,9,2 stwcx. 9,0,10 bne- 0,.L2

How to debug the Linux kernel with QEMU and KGDB?

偶尔善良 提交于 2019-11-30 14:12:55
问题 I have been able to boot a powerpc based system (MPC8544DS to be specific) using the following way to invoke qemu (v1.7.0) qemu-system-ppc -M mpc8544ds -m 512 -kernel zImage -s -nographic -initrd busyboxfs.img -append "root=/dev/ram rdinit=/bin/sh kgdboc=ttyS0,115200 kgdbwait" where zImage is a custom cross compiled Linux Kernel (v2.6.32) which has KGDB enabled and compiled in (for startupcode debugging) and busyboxfs.img is the busybox based rootfs. Since I'm using the -s flag to Qemu, I can

How can I use mach_absolute_time without overflowing?

你说的曾经没有我的故事 提交于 2019-11-30 06:59:44
问题 On Darwin, the POSIX standard clock_gettime(CLOCK_MONOTONIC) timer is not available. Instead, the highest resolution monotonic timer is obtained through the mach_absolute_time function from mach/mach_time.h . The result returned may be an unadjusted tick count from the processor, in which case the time units could be a strange multiple. For example, on a CPU with a 33MHz tick count, Darwin returns 1000000000/33333335 as the exact units of the returned result (ie, multiply the mach_absolute

Does `isync` prevent Store-Load reordering on CPU PowerPC?

会有一股神秘感。 提交于 2019-11-29 21:04:07
问题 As known, PowerPC has weak memory model, that permit any speculative reordering: Store-Store, Load-Store, Store-Load, Load-Load. There are at least 3 Fences: hwsync or sync - full memory barrier, prevents any reordering lwsync - memory barriers that prevents reordering: Load-Load, Store-Store, Load-Store isync - instruction barrier : https://www.ibm.com/support/knowledgecenter/en/ssw_aix_71/com.ibm.aix.alangref/idalangref_isync_ics_instrs.htm For example, can be reordered Store- stwcx. and

Gem not found in Ruby cron job in RVM env

拥有回忆 提交于 2019-11-29 09:43:07
问题 I'm trying to run a simple ruby script on my old PPC machine running 10.5 in an RVM environment. Searching on SO, I've followed the chosen answer from this post. This is the line in cron as a result: SHELL=/bin/bash 00 * * * * BASH_ENV=~/.bash_profile && /bin/bash -c '~/deggy/onlineGW.rb' This command runs fine in Bash at the root of the user sam. Here's the salient part of my script: #!/usr/bin/env ruby require 'open-uri' require 'nokogiri' ... Here's the output of the error from cron: X

How can I use mach_absolute_time without overflowing?

时光毁灭记忆、已成空白 提交于 2019-11-28 23:30:47
On Darwin, the POSIX standard clock_gettime(CLOCK_MONOTONIC) timer is not available. Instead, the highest resolution monotonic timer is obtained through the mach_absolute_time function from mach/mach_time.h . The result returned may be an unadjusted tick count from the processor, in which case the time units could be a strange multiple. For example, on a CPU with a 33MHz tick count, Darwin returns 1000000000/33333335 as the exact units of the returned result (ie, multiply the mach_absolute_time by that fraction to obtain a nanosecond value). We usually wish to convert from exact ticks to

How to compile dts Linux device tree source files to dtb?

自闭症网瘾萝莉.ら 提交于 2019-11-28 18:35:31
问题 I have a device tree file (.dts) and I want to compile the file for my powerpc based board. How can I do it on my machine, which is not powerpc based?? Can I do it with the DTC installed on my Ubuntu system? Or will it be more like using a separate compiler and passing ARCH information (like using a toolchain)? 回答1: Device trees do not need to be compiled with "architecture-aware" tools. The dtc compiler on your ubuntu machine is probably current enough to compile your device tree. Or you can

Emulating variable bit-shift using only constant shifts?

Deadly 提交于 2019-11-28 09:57:31
I'm trying to find a way to perform an indirect shift-left/right operation without actually using the variable shift op or any branches. The particular PowerPC processor I'm working on has the quirk that a shift-by-constant-immediate, like int ShiftByConstant( int x ) { return x << 3 ; } is fast, single-op, and superscalar, whereas a shift-by-variable, like int ShiftByVar( int x, int y ) { return x << y ; } is a microcoded operation that takes 7-11 cycles to execute while the entire rest of the pipeline stops dead . What I'd like to do is figure out which non-microcoded integer PPC ops the