Is there a way I can create an array of cl::sycl::pipe?
问题 I am using the Xilinx's triSYCL github implementation,https://github.com/triSYCL/triSYCL. I am trying to create a design with 100 cl::sycl::pipes each with capacity= 6 . And I am gonna access each pipe through a separate thread in my SYCL code. Here is what I tried: constexpr int T = 6; constexpr int n_threads = 100; cl::sycl::pipe<cl::sycl::pipe<float>> p { n_threads, cl::sycl::pipe<float> { T } }; for (int j=0; j<n_threads; j++) { q.submit([&](cl::sycl::handler &cgh) { // Get write access