inline-assembly

How to: Inline assembler in C++ (under Visual Studio 2010)

对着背影说爱祢 提交于 2019-11-30 15:34:30
I'm writing a performance-critical, number-crunching C++ project where 70% of the time is used by the 200 line core module. I'd like to optimize the core using inline assembly, but I'm completely new to this. I do, however, know some x86 assembly languages including the one used by GCC and NASM. All I know: I have to put the assembler instructions in _asm{} where I want them to be. Problem: I have no clue where to start. What is in which register at the moment my inline assembly comes into play? You can access variables by their name and copy them to registers. Here's an example from MSDN: int

How to tell GCC to generate 16-bit code for real mode

允我心安 提交于 2019-11-30 14:02:06
问题 I am writing real mode function, which should be normal function with stackframes and so, but it should use %sp instead of %esp. Is there some way to do it? 回答1: GCC 5.2.0 (and possible earlier versions) support 16-bit code generation with the -m16 flag. However, the code will almost certainly rely on 32-bit processor features (such as 32-bit wide registers), so you should check the generated assembly carefully. From the man pages: The -m16 option is the same as -m32, except for that it

Programmatically cause Undefined Instruction exception

我们两清 提交于 2019-11-30 13:27:06
I want to cause an ARM Cortex-M3 Undefined Instruction exception for the test of my test fixture. The IAR compiler supports this with inline assembly like this: asm("udf.w #0"); Unfortunately the GNU CC inline assembler does not know this opcode for the NXP LPC177x8x. It writes the diagnostic: ccw3kZ46.s:404: Error: bad instruction `udf.w #0' How can I create a function that causes a Undefined Instruction exception? Building on Masta79 's answer: There is a "permanently undefined" encoding listed in the ARMv7-M architecture reference manual - ARM DDI 0403D ( documentation placeholder,

What is the use of .byte assembler directive in gnu assembly?

折月煮酒 提交于 2019-11-30 11:49:41
While going through some C code having inline assembly I came across the .byte (with a Dot at the beginning) directive. On checking the assembly reference on web I found that it is used to reserve a byte in memory. But in the code there was no label before the statement. So I was wondering what is use of an unlabeled .byte directive or any other data storage directive for that matter. For e.g. if i code .byte 0x0a , how can i use it ? There are a few possibilities... here are a couple I can think of off the top of my head: You could access it relative to a label that comes after the .byte

What is “=qm” in extended assembler

蓝咒 提交于 2019-11-30 09:26:30
问题 I was looking through an Intel provided reference implementation of RDRAND instruction. The page is Intel Digital Random Number Generator (DRNG) Software Implementation Guide, and the code came from Intel Digital Random Number Generator software code examples. The following is the relevant portion from Intel. It reads a random value and places it in val , and it sets the carry flag on success. char rc; unsigned int val; __asm__ volatile( "rdrand %0 ; setc %1" : "=r" (val), "=qm" (rc) ); // 1

Syscall from inline asm in x86_64 Linux?

和自甴很熟 提交于 2019-11-30 06:54:58
Why does this print garbage instead of exiting my program gracefully? I use system calls this way on BSD, and I wonder what would I need to make it work in Linux. int main(int argc, char **argv) { __asm ("movq $1,%rax; movq $0,%rdi; syscall"); /* exit(0) ? */ return 0; } Thanks. Why does this print garbage instead of exiting my program gracefully? Per CESA-2009-001 , "Syscall 1 is exit on i386 but write on x86_64". what would I need to make it work in Linux Use the syscall ordinals from the current unistd_64.h Hope this helps! Syscall 1 is exit on i386 but write on x86-64 I believe. EDIT: this

x86 Assembly: INC and DEC instruction and overflow flag

牧云@^-^@ 提交于 2019-11-30 00:34:48
In x86 assembly, the overflow flag is set when an add or sub operation on a signed integer overflows, and the carry flag is set when an operation on an unsigned integer overflows. However, when it comes to the inc and dec instructions, the situation seems to be somewhat different. According to this website , the inc instruction does not affect the carry flag at all. But I can't find any information about how inc and dec affect the overflow flag, if at all. Do inc or dec set the overflow flag when an integer overflow occurs? And is this behavior the same for both signed and unsigned integers? =

Programmatically cause Undefined Instruction exception

柔情痞子 提交于 2019-11-29 20:03:15
问题 I want to cause an ARM Cortex-M3 Undefined Instruction exception for the test of my test fixture. The IAR compiler supports this with inline assembly like this: asm("udf.w #0"); Unfortunately the GNU CC inline assembler does not know this opcode for the NXP LPC177x8x. It writes the diagnostic: ccw3kZ46.s:404: Error: bad instruction `udf.w #0' How can I create a function that causes a Undefined Instruction exception? 回答1: Building on Masta79 's answer: There is a "permanently undefined"

Not getting expected output using cmpxchg8b for unsigned long

拥有回忆 提交于 2019-11-29 18:16:06
I am trying to write a simple compare and swap inline assembly code. Here is my code #include <stdio.h> #include <stdlib.h> #include <stdint.h> static inline unsigned long cas(volatile unsigned long* ptr, unsigned long old, unsigned long _new) { unsigned long prev=0; asm volatile("lock cmpxchg8b %0;" : "=m"(prev) : "m"(*ptr),"a"(old),"c"(_new) ); return prev; } int main() { unsigned long *a; unsigned long b=5,c; a=&b; c=cas(a,b,6); printf("%lu\n",c); return 0; } This code should ideally print 5 but it is printing 0. What is wrong in my code ?Please help. Let me start by saying "Using inline

What does mrc p15 do in ARM inline assembly, and how does GNU C inline asm syntax work?

时间秒杀一切 提交于 2019-11-29 18:15:52
what does this line in assembly arm does? mrc p15, 0, %0, c9, c13, 0" : : "r" (counter) who is p15 isn't it should be r15 what are all the others? what is :: who are c9, c1 what is the role of each argument? Whilst MRC is a generic co-processor inter-op instruction, cp15 is the control processor - which all modern ARM CPUs have and this has been used by ARM was a means of extending the instruction set for on-chip units such as the cache, MMU, performance monitoring and lots else besides. Taking your instruction a bit at a time: mrc p15, 0, %0, c9, c13, 0" : : "r" (counter) According to the ARM