inline-assembly | 易学教程

executing assembly within a function in c++

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问题 long getesp() { __asm__("movl %esp,%eax"); } void main() { printf("%08X\n",getesp()+4); } why does esp points to value before the stack frame is setup and does it makes any difference between with the code below? void main() { __asm__("movl %esp,%eax"); } 回答1: After i did a gcc -S file.c getesp: pushl %ebp movl %esp, %ebp subl $4, %esp #APP # 4 "xxt.c" 1 movl %esp,%eax # 0 "" 2 #NO_APP leave ret main: leal 4(%esp), %ecx andl $-16, %esp pushl -4(%ecx) pushl %ebp movl %esp, %ebp pushl %ecx subl

Modifying array elements with inline assembly

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问题 Is there a way of modifying specific array elements with inline assembly ? int move[2]; I'm looking to change move[0] and move[1] in __asm . I am a novice with assembly coding, mainly stick to C++, and there is probably a very simple answer. So far I've attempted to move move[1] into registers, move the number I want to change it to into another, and then move one into the other. I have managed to get it to compile but it doesnt actually work. 回答1: You can use something like MOV array[TYPE

Using C headers in C++ code in GNU. Error including inline assembly: impossible constraint in 'asm'

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问题 I have a weird one. I'm working on an embedded system, using the vendors header files. I'm compiling the files using GCC 4.6.3. I want to use C++ for my code, I have error I can't figure out. I'm running a vendor example program, and all I've done is changed the name of the main.c file to main.cpp. As a result, I assume, the header files are being interpreted by the C++ compiler. One of them contains the following lines: __attribute__((naked)) static return_type signature \ { \ __asm( \ "svc

error: ‘asm’ undeclared (first use in this function)

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I am getting the following error during compilation: error: ‘asm’ undeclared (first use in this function) EXCHANGE( s, *(a) ); ^ in a header file where the macro is invoked as follows: EXCHANGE( s, *(a) ); and the actual defintion of the macro is as follows: #define EXCHANGE(R,M) asm volatile ( "xchg %1, %0" : "+m" (M), "+r" (R) ) Macro invocation and definition exists in same header file. What's going wrong? I am using CMAKE to build the project and CFLAGS are as follows: set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Wall") set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -Werror") set(CMAKE_C_FLAGS "${CMAKE_C

How to specify register constraints on the Intel x86_64 register r8 to r15 in GCC inline assembly?

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问题 Here's the list of register loading codes: a eax b ebx c ecx d edx S esi D edi I constant value (0 to 31) q,r dynamically allocated register (see below) g eax, ebx, ecx, edx or variable in memory A eax and edx combined into a 64-bit integer (use long longs) But this is register constraints for intel i386. My question is where I can find the register constraints of intel x86_64 system, like: ? %r10 ? %r8 ? %rdx and so on. 回答1: The machine specific constraints have a section in the gcc manual -

Linux assembler error “impossible constraint in ‘asm’”

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问题 I'm starting with assembler under Linux. I have saved the following code as testasm.c and compiled it with: gcc testasm.c -otestasm The compiler replies: "impossible constraint in ‘asm’". #include <stdio.h> int main(void) { int foo=10,bar=15; __asm__ __volatile__ ("addl %%ebx,%%eax" : "=eax"(foo) : "eax"(foo), "ebx"(bar) : "eax" ); printf("foo = %d", foo); return 0; } How can I resolve this problem? (I've copied the example from here.) Debian Lenny, kernel 2.6.26-2-amd64 gcc version 4.3.2

Is there any simple way to improve performance of this spinlock function?

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I'm trying to implement a spinlock in my code but the spinlock that I implemented based on Wikipedia results in extremely slow performance. int lockValue = 0; void lock() { __asm__("loop: \n\t" "movl $1, %eax \n\t" "xchg %eax, lockValue \n\t" "test %eax, %eax \n\t" "jnz loop"); } Is there any way of improving this to make it faster? Thanks. How about something like this (I understand this is the KeAcquireSpinLock implementation). My at&t assembly is weak unfortunately. spin_lock: rep; nop test lockValue, 1 jnz spin_lock lock bts lockValue jc spin_lock "movl $1,%%edx \n\t" // edx = 1; ".set

Calling fsincos instruction in LLVM slower than calling libc sin/cos functions?

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问题 I am working on a language that is compiled with LLVM. Just for fun, I wanted to do some microbenchmarks. In one, I run some million sin / cos computations in a loop. In pseudocode, it looks like this: var x: Double = 0.0 for (i <- 0 to 100 000 000) x = sin(x)^2 + cos(x)^2 return x.toInteger If I'm computing sin/cos using LLVM IR inline assembly in the form: %sc = call { double, double } asm "fsincos", "={st(1)},={st},1,~{dirflag},~{fpsr},~{flags}" (double %"res") nounwind this is faster than

What does __asm volatile (“pause” ::: “memory”); do?

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I am looking at an open source C++ project which has the following code structure: while(true) { // Do something work if(some_condition_becomes_true) break; __asm volatile ("pause" ::: "memory"); } What does the last statement do? I understand that __asm means that it is an assembly instruction and I found some posts about pause instruction which say that the thread effectively hints the core to release resources and give other thread more resources (in context of hyper-threading). But what does ::: do and what does memory do? It's _mm_pause() and a compile memory barrier wrapped into one GNU

Is there an 8-bit atomic CAS (cmpxchg) intrinsic for X64 in Visual C++?

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The following code is possible in 32-bit Visual Studio C++. Is there a 64-bit equivalent using intrinsics since inline ASM isn't supported in the 64-bit version of Visual Studio C++? FORCEINLINE bool bAtomicCAS8(volatile UINT8 *dest, UINT8 oldval, UINT8 newval) { bool result=false; __asm { mov al,oldval mov edx,dest mov cl,newval lock cmpxchg byte ptr [edx],cl setz result } return(result); } The following instrinsics compile under Visual Studio C++ _InterlockedCompareExchange16 _InterlockedCompareExchange _InterlockedCompareExchange64 _InterlockedCompareExchange128 What I am looking for is