inline-assembly

I wrote a vector structure like this: struct vector { float x1, x2, x3, x4; }; Then I created a function which does some operations with inline assembly using the vector: struct vector *adding(const struct vector v1[], const struct vector v2[], int size) { struct vector vec[size]; int i; for(i = 0; i < size; i++) { asm( "FLDL %4 \n" //v1.x1 "FADDL %8 \n" //v2.x1 "FSTL %0 \n" "FLDL %5 \n" //v1.x2 "FADDL %9 \n" //v2.x2 "FSTL %1 \n" "FLDL %6 \n" //v1.x3 "FADDL %10 \n" //v2.x3 "FSTL %2 \n" "FLDL %7 \n" //v1.x4 "FADDL %11 \n" //v2.x4 "FSTL %3 \n" :"=m"(vec[i].x1), "=m"(vec[i].x2), "=m"(vec[i].x3),

There is an int value in register EBP and a string in EBX . I need to get the values from these registers in my own function, do some operations on them and finally jump back some code below. I do a JMP at 0x46AA17 to my function called JmpHook . void JmpHook() { char *mystring; _asm mov mystring, ebx printf("value: %s", mystring); _asm { jmp [0x46AA87] } } As you can see, I am trying to move the string at EBX into mystring and at the end jump back to 0x46AA87 which is located some lines below my JMP JmpHook . printf is being called and mystring being output but all this seems very untidy in

This is a follow up to What is "=qm" in extended assembler . When using RDRAND , it sets (or unsets) the Carry Flag ( CF ): char rc; unsigned int val; __asm__ volatile( "rdrand %0 ; setc %1" : "=r" (val), "=qm" (rc) ); // 1 = success, 0 = underflow if(rc) { // use val ... } Are the FLAGS and EFLAGS registers considered part of condition control so that it conveys the proper information to the compiler? Should the above be written as: __asm__ volatile( "rdrand %0 ; setc %1" : "=r" (val), "=qm" (rc) : : "cc" ); Or is the use of "cc" spurious? I know its harmless to use if unneeded. From Extended

I've written a simple assembly program: section .data str_out db "%d ",10,0 section .text extern printf extern exit global main main: MOV EDX, ESP MOV EAX, EDX PUSH EAX PUSH str_out CALL printf SUB ESP, 8 ; cleanup stack MOV EAX, EDX PUSH EAX PUSH str_out CALL printf SUB ESP, 8 ; cleanup stack CALL exit I am the NASM assembler and the GCC to link the object file to an executable on linux. Essentially, this program is first putting the value of the stack pointer into register EDX, it is then printing the contents of this register twice. However, after the second printf call, the value printed

I was engaged with an expert who allegedly has vastly superior coding skills than myself who understands inline assembly far better than I ever could. One of the claims is that as long as an operand appears as an input constraint, you don't need to list it as a clobber or specify that the register has been potentially modified by the inline assembly. The conversation came about when someone else was trying to get assistance on a memset implementation that was effectively coded this way: void *memset(void *dest, int value, size_t count) { asm volatile ("cld; rep stosb" :: "D"(dest), "c"(count),

I want to use assembly code in CUDA C code in order to reduce expensive executions as we do using asm in c programming. Is it possible? Matias Valdenegro No, you can't, there is nothing like the asm constructs from C/C++. What you can do is tweak the generated PTX assembly and then use it with CUDA. See this for an example. But for GPUs, assembly optimizations are NOT necessary, you should do other optimizations first, such as memory coalescency and occupancy. See the CUDA Best Practices guide for more information. Since CUDA 4.0, inline PTX is supported by the CUDA toolchain. There is a

I am currently experimenting with the creation of highly-optimized, reusable functions for a library of mine. For instance, I write the function "is power of 2" the following way: template<class IntType> inline bool is_power_of_two( const IntType x ) { return (x != 0) && ((x & (x - 1)) == 0); } This is a portable, low-maintenance implementation as an inline C++ template. This code is compiled by VC++ 2008 to the following code with branches: is_power_of_two PROC test rcx, rcx je SHORT $LN3@is_power_o lea rax, QWORD PTR [rcx-1] test rax, rcx jne SHORT $LN3@is_power_o mov al, 1 ret 0 $LN3@is

I'm trying to write GCC inline asm for CMPXCHG8B for ia32. No, I cannot use __sync_bool_compare_and_swap . It has to work with and without -fPIC. So far the best I've ( EDIT : does not work after all, see my own answer below for details) is register int32 ebx_val asm("ebx")= set & 0xFFFFFFFF; asm ("lock; cmpxchg8b %0;" "setz %1;" : "+m" (*a), "=q" (ret), "+A" (*cmp) : "r" (ebx_val), "c" ((int32)(set >> 32)) : "flags") However I'm not sure if this is in fact correct. I cannot do "b" ((int32)(set & 0xFFFFFFFF)) for ebx_val due to PIC, but apparently register asm("ebx") variable is accepted by