cortex-m3

I have a Keil ULINK2 USB emulator box attached to the JTAG connector on my board, which is working fine with the Cortex-M3 CPU onboard (TI/Stellaris/LuminaryMicro LM3S series). It seems that both a JTAG and a SWJ-DP port share the same pins (and thus connector on your board) on these CPUs. One appears not to have ITM (printf) capability, the other does. The previous firmware people have always used stdio to UART (serial port), but I need the serial port freed up so that debug messages do not interfere with other data being sent/received to/from the serial port, thus I need for trace messages

I am curious - What is the difference between .equ and .word directives in ARM assembly, when defining constants? old_timer .equ is like #define in C: #define bob 10 .equ bob, 10 .word is like unsigned int in C: unsigned int ted; ted: .word 0 Or initialized with a value: unsigned int alice = 42; alice: .word 42 .word is a directive that allocates a word-sized amount of storage space (memory) in that location. It can additionally have that location initialized with a given value. .equ is more like a C preprocessor #define statement - it gets substituted in any subsequent code. https:/

I want to cause an ARM Cortex-M3 Undefined Instruction exception for the test of my test fixture. The IAR compiler supports this with inline assembly like this: asm("udf.w #0"); Unfortunately the GNU CC inline assembler does not know this opcode for the NXP LPC177x8x. It writes the diagnostic: ccw3kZ46.s:404: Error: bad instruction `udf.w #0' How can I create a function that causes a Undefined Instruction exception? Building on Masta79 's answer: There is a "permanently undefined" encoding listed in the ARMv7-M architecture reference manual - ARM DDI 0403D ( documentation placeholder,

I have an embedded project using a STM32F103 (ARM Cortex M3), it is getting a occasionally getting hard fault in release mode. As part of recovery, I would like to retrieve the PC value from before the hard fault and store it for later debugging in the battery backed region. How would I determine the value of the program counter at the point of the hard fault? Obviously, the PC is now set to its location within the hardfault interrupt. Where should I look? It there an address for the normal mode register bank? Thanks! Cortex-M3 uses a quite different model of exception handling from the

When you build a gcc toolchain there is the possibility to build it as arm-elf or as arm-none-eabi, but what is the difference? I use the eabi today, but that is just since everyone else seem to do that... but since that is a really bad argument, it would be really nice to understand the difference. Note: This toolchain will crosscompile code for Cortex-M3 based mcu:s like the stm32. Thanks Some links : EABI: http://en.wikipedia.org/wiki/Application_binary_interface http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.subset.swdev.abi/index.html ELF: http://en.wikipedia.org/wiki

Is there any way to disable all irq from Cortex M3 MCU except one ? My issue is that I have a system running several kinds of irq with various priority levels and I want to disable all irq except one in a particular state. I know I can disable all irq by using "__disable_irq()" instruction but I can't enable one irq after calling this instruction if I didn't call "__enable_irq()" before. Thanks for your help, Regards Use the BASEPRI register to disable all interrupts below the specified priority level. This is a core register, described in the Cortex-M3 Programming Manual . CMSIS provides the

I'm working with FreeRTOS on an STM32 (Cortex-M3), and using the CMSIS library from ST to bootstrap everything. The CMSIS library defines the weak symbol SVC_Handler in the startup ".s" file. It must be overridden somewhere in order to get your ISR in the interrupt vector table. FreeRTOS defines vPortSVCHandler , which is the ISR I want to have handle the SVC interrupt. I would like to "glue" the two together using my application code (i.e. w/o modifyng FreeRTOS or the CMSIS source code). I thought an alias would be the right tool for the job, so I tried this (in a separate source file, main.c

原文 https://blog.strongwong.top/posts/%E5%85%B3%E4%BA%8E-ARM-Cortex-M3-%E7%9A%84%E5%90%AF%E5%8A%A8%E6%96%87%E4%BB%B6%E5%88%86%E6%9E%90%E5%8F%8A%E5%88%86%E6%95%A3%E5%8A%A0%E8%BD%BD.html 来源： https://www.cnblogs.com/dreamblog/p/11404104.html