carryflag

In the following code, MOV AL,NUMBER1 ADD AL,NUMBER2 MOV AH, 00H ADC AH, 00H what are lines 3 and 4 for? What do they do? Also, why does the code clear AH? (I assume because AL's "ADD" operation may produce carry.) To figure this out, start by looking up what each instruction does: MOV AH, 00H This MOV instruction will set the AH register to 0 without affecting flags. ADC AH, 00H This ADC instruction will add the source operand (0), the carry flag (CF), and the destination operand ( AH ), storing the result in the destination operand ( AH ). Symbolically, then, it does: AH = AH + 0 + CF

It is said that the subtraction is performed in 2's complement in 8085 and so the flags must be set according to the operation. However,in the figure shown, i am unable to figure out the reason behind auxiliary carry flag being set to '0' and the same goes for carry flag. When i performed 2's complement operation, i found carry=1 (which is not taken into consideration in 2's complement) and i also found carry of 1 shifting from lower nibble to upper and so i thought auxiliary carry to be 1. But i found just the opposite for both of them. Similarly in the second case shown below, manually i got

What actually happens when a Byte overflows? Say we have byte byte1 = 150; // 10010110 byte byte2 = 199; // 11000111 If we now do this addition byte byte3 = byte1 + byte2; I think we'll end up with byte3 = 94 but what actually happens? Did I overwrite some other memory somehow or is this totally harmless? It's quite simple. It just does the addition and comes off at a number with more than 8 bits. The ninth bit (being one) just 'falls off' and you are left with the remaining 8 bits which form the number 94. (yes it's harmless) In C# if you have checked { byte byte3 = byte1 + byte2; } It will

I'm trying to wrap my head around overflow & carry flags in x86. As I understand it, for addition of signed 2's complement numbers, the flags can only be generated in one of four ways (my examples are 4-bit numbers): pos+pos = neg (overflow) 0111 + 0001 = 1000 (7 + 1 = -8) pos+neg = pos (carry) 0011 + 1110 = 0001 (3 + -2 = 1) neg+neg = neg (carry) 1111 + 1111 = 1110 (-1 + -1 = -2) neg+neg = pos (overflow & carry) 1000 + 1001 = 0001 (-8 + -7 = 1) So, in x86 assembly, does subracting B from A generate the same flags as adding A and -B? Here's a reference table that might help. This shows an

I'm using a 128 bit integer counter in the very inner loops of my C++ code. (Irrelevant background: The actual application is evaluating finite difference equations on a regular grid, which involves repetitively incrementing large integers, and even 64 bits isn't enough precision because small rounding accumulates enough to affect the answers.) I've represented the integer as two 64 bit unsigned longs. I now need to increment those values by a 128 bit constant. This isn't hard, but you have to manually catch the carry from the low word to the high word. I have working code something like this: