avx

问题 I have a union that looks like this union bareVec8f { __m256 m256; //avx 8x float vector float floats[8]; int ints[8]; inline bareVec8f(){ } inline bareVec8f(__m256 vec){ this->m256 = vec; } inline bareVec8f &operator=(__m256 m256) { this->m256 = m256; return *this; } inline operator __m256 &() { return m256; } } the __m256 needs to be aligned on 32 byte boundary to be used with SSE functions, and should be automatically, even within the union. And when I do this bareVec8f test = _mm256_set1

问题 Let's say I have a function written in c++ that performs matrix vector multiplications on a lot of vectors. It takes a pointer to the array of vectors to transform. Am I correct to assume that the compiler cannot efficiently optimize that to SIMD instructions because it does not know the alignment of the passed pointer (requiring a 16 byte alignment for SSE or 32 byte alignment for AVX) at compile time? Or is the memory alignment of the data irrelevant for optimal SIMD code and the data

问题 Let's say I have a function written in c++ that performs matrix vector multiplications on a lot of vectors. It takes a pointer to the array of vectors to transform. Am I correct to assume that the compiler cannot efficiently optimize that to SIMD instructions because it does not know the alignment of the passed pointer (requiring a 16 byte alignment for SSE or 32 byte alignment for AVX) at compile time? Or is the memory alignment of the data irrelevant for optimal SIMD code and the data

问题 I'm tried to improve performance of copy operation via SSE and AVX: #include <immintrin.h> const int sz = 1024; float *mas = (float *)_mm_malloc(sz*sizeof(float), 16); float *tar = (float *)_mm_malloc(sz*sizeof(float), 16); float a=0; std::generate(mas, mas+sz, [&](){return ++a;}); const int nn = 1000;//Number of iteration in tester loops std::chrono::time_point<std::chrono::system_clock> start1, end1, start2, end2, start3, end3; //std::copy testing start1 = std::chrono::system_clock::now();

问题 I'm tried to improve performance of copy operation via SSE and AVX: #include <immintrin.h> const int sz = 1024; float *mas = (float *)_mm_malloc(sz*sizeof(float), 16); float *tar = (float *)_mm_malloc(sz*sizeof(float), 16); float a=0; std::generate(mas, mas+sz, [&](){return ++a;}); const int nn = 1000;//Number of iteration in tester loops std::chrono::time_point<std::chrono::system_clock> start1, end1, start2, end2, start3, end3; //std::copy testing start1 = std::chrono::system_clock::now();

问题 I want to achieve the maximum bandwidth of the following operations with Intel processors. for(int i=0; i<n; i++) z[i] = x[i] + y[i]; //n=2048 where x, y, and z are float arrays. I am doing this on Haswell, Ivy Bridge , and Westmere systems. I originally allocated the memory like this char *a = (char*)_mm_malloc(sizeof(float)*n, 64); char *b = (char*)_mm_malloc(sizeof(float)*n, 64); char *c = (char*)_mm_malloc(sizeof(float)*n, 64); float *x = (float*)a; float *y = (float*)b; float *z = (float

问题 My C++ code uses SSE and now I want to improve it to support AVX when it is available. So I detect when AVX is available and call a function that uses AVX commands. I use Win7 SP1 + VS2010 SP1 and a CPU with AVX. To use AVX, it is necessary to include this: #include "immintrin.h" and then you can use intrinsics AVX functions like _mm256_mul_ps , _mm256_add_ps etc. The problem is that by default, VS2010 produces code that works very slowly and shows the warning: warning C4752: found Intel(R)

问题 My C++ code uses SSE and now I want to improve it to support AVX when it is available. So I detect when AVX is available and call a function that uses AVX commands. I use Win7 SP1 + VS2010 SP1 and a CPU with AVX. To use AVX, it is necessary to include this: #include "immintrin.h" and then you can use intrinsics AVX functions like _mm256_mul_ps , _mm256_add_ps etc. The problem is that by default, VS2010 produces code that works very slowly and shows the warning: warning C4752: found Intel(R)

问题 I've been trying to figure out a performance problem in an application and have finally narrowed it down to a really weird problem. The following piece of code runs 6 times slower on a Skylake CPU (i5-6500) if the VZEROUPPER instruction is commented out. I've tested Sandy Bridge and Ivy Bridge CPUs and both versions run at the same speed, with or without VZEROUPPER . Now I have a fairly good idea of what VZEROUPPER does and I think it should not matter at all to this code when there are no

问题 I made matrix-vector multiplication program using AVX2, FMA in C. I compiled using GCC ver7 with -mfma, -mavx. However, I got the error "incorrect checksum for freed object - object was probably modified after being freed." I think the error would generate if the matrix dimension isn't multiples of 4. I know AVX2 use ymm register that can use 4 double precision floating point number. Therefore, I can use AVX2 without error in case the matrix is multiples of 4. But, here is my question. How