avx

I'm trying to work with AVX instructions and windows 64bit. I'm comfortable with g++ compiler so I've been using that, however, there is a big bug described reported here and very rough solutions were presented here . Basically, m256 variable can't be aligned on the stack to work properly with avx instructions, it needs 32 byte alignment. The solutions presented at the other stack question I linked are really terrible, especially if you have performance in mind. A python program that you would have to run every time you want to debug that replaces instructions with their sub-optimal unaligned

I've been investigating the benefits of SIMD algorithms in C# and C++, and found that in many cases using 128-bit registers on an AVX processor offers a better improvement than using 256-bit registers on a processor with AVX2, but I don't understand why. By improvement I mean the speed-up of a SIMD algorithm relative to a non-SIMD algorithm on the same machine. On an AVX processor, the upper half of the 256 bit registers and floating point units are powered down by the CPU when not executing AVX instructons (VEX encoded opcodes). When code does use AVX instructions, the CPU has to power up the

In SSE3, the PALIGNR instruction performs the following: PALIGNR concatenates the destination operand (the first operand) and the source operand (the second operand) into an intermediate composite, shifts the composite at byte granularity to the right by a constant immediate, and extracts the right-aligned result into the destination. I'm currently in the midst of porting my SSE4 code to use AVX2 instructions and working on 256bit registers instead of 128bit. Naively, I believed that the intrinsics function _mm256_alignr_epi8 (VPALIGNR) performs the same operation as _mm_alignr_epi8 only on

Consider this simple code: #include <complex.h> complex float f(complex float x) { return x*x; } If you compile it with -O3 -march=core-avx2 -fp-model strict using the Intel Compiler you get: f: vmovsldup xmm1, xmm0 #3.12 vmovshdup xmm2, xmm0 #3.12 vshufps xmm3, xmm0, xmm0, 177 #3.12 vmulps xmm4, xmm1, xmm0 #3.12 vmulps xmm5, xmm2, xmm3 #3.12 vaddsubps xmm0, xmm4, xmm5 #3.12 ret This is much simpler code than you get from both gcc and clang and also much simpler than the code you will find online for multiplying complex numbers. It doesn't, for example appear explicitly to deal with complex

I'm trying to get TensorFlow up on my Chromebook, not the best place, I know, but I just want to get a feel for it. I haven't done much work in the Python dev environment, or in any dev environment for that matter, so bear with me. After figuring out pip, I installed TensorFlow and tried to import it, receiving this error: Python 3.5.2 (default, Nov 23 2017, 16:37:01) [GCC 5.4.0 20160609] on linux Type "help", "copyright", "credits" or "license" for more information. >>> import tensorflow as tf 2018-12-11 06:09:54.960546: F tensorflow/core/platform/cpu_feature_guard.cc:37] The TensorFlow

In the code below I changed the "dataLen" and get different efficiency. dataLen = 400 SSE time:758000 us AVX time:483000 us SSE > AVX dataLen = 2400 SSE time:4212000 us AVX time:2636000 us SSE > AVX dataLen = 2864 SSE time:6115000 us AVX time:6146000 us SSE ~= AVX dataLen = 3200 SSE time:8049000 us AVX time:9297000 us SSE < AVX dataLen = 4000 SSE time:10170000us AVX time:11690000us SSE < AVX The SSE and AVX code can be both simplified into this: buf3[i] += buf1[1]*buf2[i]; #include "testfun.h" #include <iostream> #include <chrono> #include <malloc.h> #include "immintrin.h" using namespace std: