avx

Count leading zeros in __m256i word

白昼怎懂夜的黑 提交于 2019-12-06 00:53:03
问题 I'm tinkering around with AVX-2 instructions and I'm looking for a fast way to count the number of leading zeros in a __m256i word (which has 256 bits). So far, I have figured out the following way: // Computes the number of leading zero bits. // Here, avx_word is of type _m256i. if (!_mm256_testz_si256(avx_word, avx_word)) { uint64_t word = _mm256_extract_epi64(avx_word, 0); if (word > 0) return (__builtin_clzll(word)); word = _mm256_extract_epi64(avx_word, 1); if (word > 0) return (_

AVX2, How to Efficiently Load Four Integers to Even Indices of a 256 Bit Register and Copy to Odd Indices?

蹲街弑〆低调 提交于 2019-12-05 23:43:49
问题 I have an aligned array of integers in memory containing indices I0, I1, I2, I3. My goal is to get them into a __m256i register containing I0, I0 + 1, I1, I1 + 1, I2, I2 + 1, I3, I3 + 1. The hard part is getting them into the 256 bit register as I0, I0, I1, I1, I2, I2, I3, I3, after which I can just add a register containing 0, 1, 0, 1, 0, 1, 0, 1. I found the intrinsic, _mm256_castsi128_si256, which lets me load the 4 integers into the lower 128 bits of the 256 bit register, but I'm

Optimising 2D rotation

我们两清 提交于 2019-12-05 22:49:11
Given the classic formula for rotating a point in 2D space: cv::Point pt[NPOINTS]; cv::Point rotated[NPOINTS]; float angle = WHATEVER; float cosine = cos(angle); float sine = sin(angle); for (int i = 0; i < NPOINTS; i++) { rotated[i].x = pt[i].x * cosine - pt[i].y * sine; rotated[i].y = pt[i].x * sine + pt[i].y * cosine; } Given NPOINTS is 32 and the arrays are aligned, how would one go about optimising the code for SSE or AVX? Searching around here and elsewhere didn't turn up anything useful, and I got lost about here: __m128i onePoint = _mm_set_epi32(pt[i].x, pt[i].y, pt[i].x, pt[i].y); _

Websocket data unmasking / multi byte xor

僤鯓⒐⒋嵵緔 提交于 2019-12-05 21:15:31
websocket spec defines unmasking data as j = i MOD 4 transformed-octet-i = original-octet-i XOR masking-key-octet-j where mask is 4 bytes long and unmasking has to be applied per byte. Is there a way to do this more efficiently, than to just loop bytes? Server running the code can assumed to be a Haswell CPU, OS is Linux with kernel > 3.2, so SSE etc are all present. Coding is done in C, but I can do asm as well if necessary. I'd tried to look up the solution myself, but was unable to figure out if there was an appropriate instruction in any of the dozens of SSE1-5/AVE/(whatever extension -

x86 CPU Dispatching for SSE/AVX in C++

天大地大妈咪最大 提交于 2019-12-05 20:53:58
I have an algorithm which benefits from hand optimisation with SSE(2) intrinsics. Moreover, the algorithm will also be able to benefit from the 256-bit AVX registers in the future. My question is what is the best way to Register the availability variants of my class at compile time; so if my classes are, say: Foo , FooSSE2 and FooAVX I require a means of determining at runtime what classes are compiled in. Determine the capabilities of the current CPU. At the lowest level this will result in a cpuid call. Decide at runtime what to use based on what is compiled and what is supported. While I

What is vmovdqu doing here?

与世无争的帅哥 提交于 2019-12-05 20:34:25
I have a Java loop that looks like this: public void testMethod() { int[] nums = new int[10]; for (int i = 0; i < nums.length; i++) { nums[i] = 0x42; } } The assembly I get is this: 0x00000001296ac845: cmp %r10d,%ebp 0x00000001296ac848: jae 0x00000001296ac8b4 0x00000001296ac84a: movl $0x42,0x10(%rbx,%rbp,4) 0x00000001296ac852: inc %ebp 0x00000001296ac854: cmp %r11d,%ebp 0x00000001296ac857: jl 0x00000001296ac845 0x00000001296ac859: mov %r10d,%r8d 0x00000001296ac85c: add $0xfffffffd,%r8d 0x00000001296ac860: mov $0x80000000,%r9d 0x00000001296ac866: cmp %r8d,%r10d 0x00000001296ac869: cmovl %r9d,

Horizontal trailing maximum on AVX or SSE

落花浮王杯 提交于 2019-12-05 18:16:27
I have an __m256i register consisting of 16bit values and I want to get the maximum values on each trailing element which are zeroes. To give an example: input: 1 0 0 3 0 0 4 5 0 0 0 0 4 3 0 2 output: 1 1 1 3 3 3 4 5 5 5 5 5 4 3 3 2 Are there any efficient way of doing this on AVX or AVX architecture? Maybe with log(16) = 4 iterations? Addition: Any solution on 128 bit numbers with 8 uint_16's in it are appreciated also. You can do this in log_2(SIMD_width) steps indeed. The idea is to shift the input vector x_vec two bytes. Then we blend x_vec with the shifted vector such that x_vec is

Determine the minimum across SIMD lanes of __m256 value

做~自己de王妃 提交于 2019-12-05 17:03:53
I understand that operations across SIMD lanes should generally be avoided. However, sometimes it has to be done. I am using AVX2 intrinsics, and have 8 floating point values in an __m256. I want to know the lowest value in this vector, and to complicate matters: also in which slot this was. My current solution makes a round trip to memory, which I don't like: float closestvals[8]; _mm256_store_ps( closestvals, closest8 ); float closest = closestvals[0]; int closestidx = 0; for ( int k=1; k<8; ++k ) { if ( closestvals[k] < closest ) { closest = closestvals[ k ]; closestidx = k; } } What would

How can I convert a vector of float to short int using avx instructions?

社会主义新天地 提交于 2019-12-05 12:58:54
Basically how can I write the equivalent of this with AVX2 intrinsics? We assume here that result_in_float is of type __m256 , while result is of type short int* or short int[8] . for(i = 0; i < 8; i++) result[i] = (short int)result_in_float[i]; I know that floats can be converted to 32 bit integers using the __m256i _mm256_cvtps_epi32(__m256 m1) intrinsic, but have no idea how to convert these 32 bit integers further to 16 bit integers. And I don't want just that but also to store those values (in the form of 16 bit integers) to the memory, and I want to do that all using vector instructions.

Does .NET Framework 4.5 provide SSE4/AVX support?

纵然是瞬间 提交于 2019-12-05 12:41:10
I think, I heard about that, but don't know where. upd: I told about JiT it seem that it is coming. (I just found out an hour ago) here a few links The JIT finally proposed. JIT and SIMD are getting married. Update to SIMD Support you need the latest version of RyuJIT and Microsoft SIMD-enabled Vector Types (Nuget) No, there's no scenario in .NET where you can write machine code yourself. Code generation is entirely up to the just-in-time compiler. It is certainly capable of customizing its code generation based on the capabilities of the machine's processor. One of the big reasons why ngen