avx

问题 This question already has answers here : How to check if a CPU supports the SSE3 instruction set? (5 answers) cpu dispatcher for visual studio for AVX and SSE (3 answers) Closed 4 years ago . I would like to check if SSE4 or AVX is supported at runtime, so that my program may take advantage of processor specific instructions without creating a binary for each processor. If I could determine it at runtime, I could use an interface and switch between different instruction sets. 回答1: GCC has a

问题 Closed. This question is off-topic. It is not currently accepting answers. Want to improve this question? Update the question so it's on-topic for Stack Overflow. Closed 4 years ago . Is there any good C/C++ tutorials or examples for learning Intel SSE and AVX instructions? I found few on Microsoft MSDN and Intel sites, but it would be great to understand it from the basics.. 回答1: For the visually inclined SIMD programmer, Stefano Tommesani's site is the best introduction to x86 SIMD

问题 I am trying to profile my C++ code using perf tool. Implementation contains code with SSE/AVX/AVX2 instructions. In addition to that code is compiled with -O3 -mavx2 -march=native flags. I believe __memset_avx2_unaligned_erms function is a libc implementation of memset . perf shows that this function has considerable overhead. Function name indicates that memory is unaligned, however in the code I am explicitly aligning the memory using GCC built-in macro __attribute__((aligned (x))) What

问题 I have an image drawing routine which is compiled multiple times for SSE, SSE2, SSE3, SSE4.1, SSE4.2, AVX and AVX2. My program dynamically dispatches one of these binary variations by checking CPUID flags. On Windows, I check the version of Windows and disable AVX/AVX2 dispatch if the OS doesn't support them. (For example, only Windows 7 SP1 or later supports AVX/AVX2.) I want to do the same thing on Mac OS X, but I'm not sure what version of OS X supports AVX/AVX2. Note that what I want to

问题 I have manged to convert most of my SIMD code to us the vector extensions of GCC. However, I have not found a good solution for doing a broadcast as follows __m256 areg0 = _mm256_broadcast_ss(&a[i]); I want to do __m256 argeg0 = a[i]; If you see my answer at Mutiplying vector by constant using SSE I managed to get broadcasts working with another SIMD register. The following works: __m256 x,y; y = x + 3.14159f; // broadcast x + 3.14159 y = 3.14159f*x; // broadcast 3.14159*x but this won't work

问题 I'm developing optimizations for my 3D calculations and I now have: a " plain " version using the standard C language libraries, an SSE optimized version that compiles using a preprocessor #define USE_SSE , an AVX optimized version that compiles using a preprocessor #define USE_AVX Is it possible to switch between the 3 versions without having to compile different executables (ex. having different library files and loading the "right" one dynamically, don't know if inline functions are "right

问题 I'm developing optimizations for my 3D calculations and I now have: a " plain " version using the standard C language libraries, an SSE optimized version that compiles using a preprocessor #define USE_SSE , an AVX optimized version that compiles using a preprocessor #define USE_AVX Is it possible to switch between the 3 versions without having to compile different executables (ex. having different library files and loading the "right" one dynamically, don't know if inline functions are "right

问题 What I'm trying to achieve is based on each bit in a byte, set to all ones in each dword in a ymm register (or memory location) e.g. al = 0110 0001 ymm0 = 0x00000000 FFFFFFFF FFFFFFFF 00000000 00000000 00000000 00000000 FFFFFFFF i.e. an inverse of vmovmskps eax, ymm0 / _mm256_movemask_ps , turning a bitmap into a vector mask. I'm thinking there are a handful of sse/avx instructions that can do this relatively simply but I haven't been able to work it out. Preferably sandy bridge compatible so

问题 If I have an AVX register with 4 doubles in them and I want to store the reverse of this in another register, is it possible to do this with a single intrinsic command? For example: If I had 4 floats in a SSE register, I could use: _mm_shuffle_ps(A,A,_MM_SHUFFLE(0,1,2,3)); Can I do this using, maybe _mm256_permute2f128_pd() ? I don't think you can address each individual double using the above intrinsic. 回答1: You actually need 2 permutes to do this: _mm256_permute2f128_pd() only permutes in

问题 How many clock cycles does cost AVX/SSE exponentiation on modern x86_64 CPU? I am about: pow(x, y) = exp(y*log(x)) I.e. do both exp() and log() AVX x86_64 instructions require certain known number of cycles? exp(): _mm256_exp_ps() log(): _mm256_log_ps() Or the number of cycles may vary depending on the exponential degree, is there the maximum number of cycles can cost exponentiation? 回答1: The x86 SIMD instruction set (i.e. not x87), at least up to AVX2, does not include SIMD exp , log , or